|As a design-team member, shape the micro-architecture of the chip, and write specifications for the relevant block, micro-architecture of the block, design implementation using RTL coding techniques, Synthesis, place and route, and timing signoff.
- Work with the Verification team on pre-silicon verification tasks such as reviewing the verification test plan, coverage analysis, and full-chip simulation plus debug.
- Work with the physical design teams in aiding the implementation of the functional blocks.
- Work with project manager to scope and assign tasks, including mentoring less experienced engineers
- Work with multiple design centers and design groups to shape future methodology
- Work with post silicon group to resolve any lab issues or customer issue
- Work with software team to ensure product meets all software use cases
- BSEE or equivalent required with up to 15+ years of experience in RTL design of submicron SOC products (eg: Microprocessor based SOCs). MSEE with 12+ years of experience.
- Experience in Micro-architecture for the complex Custom/ASIC products focusing in any one/more areas: NPU, Embedded Processors, DSP, Graphics, and/or general purpose microprocessors.
- RTL design experience, Synthesis, static-timing closure, formal verification, gate-level simulations and block-level function verification.
- Design knowledge of one/more industry-standard bus interfaces (PCIe, SPI, SRIO, USB, XAUI, etc.) and memory interfaces (DDR2, DDR3, etc.) are a plus. ands-on experience for all aspects of chip-development process with proficiency in front-end design tools and methodologies is a plus.
- Experience in designing high speed (>1 GHz)/high-performance embedded processor SOC products is a plus.
- Experience in implementation/timing closure for high speed design
- Knowledge of scripting languages such as Perl, Tcl, and UNIX shell, etc. is desirable