Posted on: 2019-06-04

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Position or Job Title SENIOR DFT ASIC ENGINEER
Position Industry Information Technology
Internal Job ID BP-26
Position Location (City) San Jose
State California
Country United States
ON or OFF Site? On-Site, NO Telecommute

Description & Requirements

Description of Job Opening
We are currently on the search for a super star to implement modern DFT solutions for leading edge ICs on latest technology nodes. In this role, you will:

- Work with RTL, custom digital/analog, verification and physical implementation teams during DFT implementation.

- Work with cross functional groups to verify DFT implementation pre tape-out

- Drive successful bring-up of test features post tape-out.

- Add to the in-house expertise on DFT to consult with, educate, and train design staff members on DFT requirements on how to prepare new designs to work properly with Cavium DFT solutions.

- Hands-on experience with scan test, logic and memory BIST/BISR,functional test, JTAG, and other test methodologies

- Strong background in industry standard scan test (including scan compression) and memory BIST/BISR tools

- Strong background in IC RTL design and using Verilog/SystemVerilog

- Experience and knowledge of Synthesis, IC routing and static timing tools

- Experience and knowledge of functional verification, especially of DFT features

- Experience and knowledge of modern JTAG standards and implementation

- Experience and knowledge of high-volume test equipment (ATE) and system-level test (SLT)

- Proficiency with programming and scripting languages such as Perl/TCL

- Must have effective interpersonal and teamwork skills.

- Proficiency in working with cross functional and cross site teams.

- Excellent communication skills

- Demonstrates good analysis and problem-solving skills.

- Has an inherent sense of urgency and accountability.

- Must have the ability to multi-task in a fast paced environment

- BSEE or equivalent with 10+ years of experience in design for test

Preferred/Plus:

- Experience with board/bench debug features and capabilities strongly desired

Education: MSEE

Required Skills
Experience with implement modern DFT solutions for leading edge ICs.
Nice To Have Skills
None Listed
Required Certifications
None Listed

Additional Details

Required Employment Authorization Type of Position
Other Full-time
Hourly Rate (US$) Annual Salary (US$)
NA /hr NA /annual
Relocation Assistance Provided Required Travel
No, Relocation Assistance None
Start Date Required Experience
25-Jun-19 10 - 15 Years
Required Education Required Education Major
Masters, MSEE

Recruiter Contact Information

To apply, please click on the e-mail address and attach your resume or complete the form further below.


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Recruiter George Olivas
Professional Title Technical Recruiter
E-mail Address george@blueprintjobs.com
Address 7668 El Camino Real, Suite 104129
 
 
City / Municipality Carlsbad
State California
Postal / Zip Code 92009
Office Phone 760-452-5211 Extension: NA
Other Phone None Listed
Fax Number None Listed

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